In a case where image data is transferred from a host processor (hereinafter referred to simply as “host”) to a display panel such as an LCD, that image data is typically first stored temporarily in a frame memory (hereinafter referred to simply as “memory”) of an LCD controller (LCDC), and is then outputted to the display panel. This arrangement eliminates the need to transfer image data from the host to the display panel while the display data is not updated.
A seamless process such as reproducing a moving image, however, involves substantially simultaneous, parallel steps of (i) inputting image data from the host to the memory of the LCDC (write operation) and (ii) outputting the image data from the LCDC to the display panel (read operation).
Thus, in a case where it is impossible to compensate for the difference between the respective rates of image data transfer, incomplete image data stored in the memory is outputted to the display panel, that is, there occurs overtaking for image data (called “tearing”). Tearing lets incomplete image data be outputted to the display panel, with the result of flicker during image display.
Patent Literature 1 discloses a method for updating a frame buffer (memory) as a conventional technique for preventing such tearing. This method is for transmitting timing information through a communication link between a first processor and a second processor.
The above method is arranged such that the communication link is in a suspend mode, and that the first processor schedules time events to transmit timing information to the second processor. The above method is further arranged such that the first processor starts a link wakeup at the occurrence of a time event, that the second processor detects the link wakeup, and that the first processor and the second processor are synchronized with each other for the transmitted timing information on the basis of timing of the detected link wakeup.